1. Field of the Invention
The invention generally relates to synchronous electronic integrated circuits provided with combinatorial logic means, flip-flop circuits, and test means. More specifically, the invention relates to an electronic circuit comprising a plurality of configurable cells and a control circuit, the electronic circuit being adapted to working in a standard mode of operation or in a test mode during which the control circuit is active and configures the configurable cells:                either in a functional state in which the configurable cells are functionally linked to logic cells with which they co-operate to form a logic circuit,        or in a chained state in which the configurable cells are functionally connected in a chain to form a shift register.        
2. Description of the Related Art
At present, there are well-known ways of testing for the proper working of the functional elements of an integrated circuit. This is done by the imposition and/or determination, at predefined instants, of data values present at certain internal points of this integrated circuit.
Such a technique of testing the internal paths of an integrated circuit (called a “scanpath” or “internal scan method”) is described for example by M. Williams and J. Angel, in “Enhancing Testability of LSI Circuits Via Test Points and Additional Logic, IEEE Transactions on Computers, vol. C-22, No. 1; January 1973”.
According to this technique, each of the flip-flop circuits of the logic circuit, whose state needs to be known and/or for which it is necessary to impose the content during the standard operation of the integrated circuit, is provided at its input with a multiplexer.
The different flip-flop circuits and the multiplexers that are associated with these flip-flop circuits thus constitute an equivalent number of configurable cells whose access ports are individually controlled by these multiplexers.
The multiplexers of these different configurable cells are collectively controlled by an access controller or TAP (Test Access Port) controller which is inactive or active depending on a chosen mode of operation of the electronic circuit (standard mode of operation or test mode). When the TAP controller is activated by a mode control signal (entailing the passage of the electronic circuit into test mode), it uses this set of configurable cells either as a standard functional circuit, integrated into the logic circuit that it forms with the logic cells, or as a test circuit.
To do this, the TAP controller addresses control signals on various control conductors by which it is connected to the different configurable cells. These control signals are, for example, a chaining control signal or again a data propagation control signal. They modify the paths of the circulation of data items within the integrated circuit and thus enable the capture of these data items by the controller with a view to its analysis.
In the standard mode of operation, the TAP controller is inactive and the multiplexers of the configurable cells are positioned in such a way that the flip-flop circuits of these cells are connected to surrounding logic cells to define one or more functional sub-sets of the integrated circuit.
In the test mode of the electronic circuit, the TAP controller is normally activated by a test execution command received from the exterior, and it can produce a chaining control signal for the series connection of the flip-flop circuits of the configurable cells so as to form a shift register.
This register comprises especially a serial input and a serial output respectively connected to an output and to an input of the TAP controller, as well as a clock input receiving a clock signal to set the pace of the flow of data.
A test of the integrated circuit is performed by activating the TAP controller; the test comprises chiefly the following three steps:                In a first step, the TAP controller configures the cells in test mode and then serially loads data into the flip-flop circuits of the configurable cells through the input of the shift register formed by these cells;        Then, the TAP controller changes the selection switching of the multiplexers to form the functional circuit (standard functioning mode), and orders the execution of one or more clock cycles by this functional circuit. The data items loaded into the flip-flop circuits of the configurable cells are then processed by the functional circuit;        The controller then once again changes the selection switching of the multiplexers to again form the shift register (test mode) and, at the output of the shift register, it serially retrieves the data items stored in the flip-flop circuits of the configurable cells during the last clock cycle.        
After the complete downloading of the data, a new test may be executed as the case may be. After all the tests have been performed, the controller produces a signal indicating the end of the test mode (the deactivation by the controller of the test control signal).
Despite the confirmed utility of this testing technique, its practical application may prove to be problematic in certain circumstances, especially in integrated circuits that process secret data.
Indeed, inasmuch as the activation of the test mode may enable a fraudulent individual to read the content of the flip-flop circuits of the configurable cells, this testing technique, in principle, has the drawback of making such circuits highly vulnerable to fraudulent use.
For example, by stopping a process of internal loading of secret data into the integrated circuit at various points in time and by downloading the contents of the shift register, a fraudulent person could obtain information on secret data, and even reconstitute this data.
By activating the test mode, a fraudulent individual could also obtain write access to the flip-flop circuits of the configurable cells to insert fraudulent data, or else place the integrated circuit in an unauthorized configuration. He could thus, for example, access a register controlling a security element such as a sensor in order to deactivate it. He could also insert a piece of erroneous data in order to obtain information on a secret data item.
Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above.